Position:Senior Design Verification Engineer (eInfochips Inc) Job Description: What Youll Be Doing: Testbenches: Build scalable verification environments using UVM and SystemVerilog. Planning: Create detailed verification plans from architectural specifications. Execution: Write, run, and debug constrained-random tests
Join the elite team at QDSS, where our engineers are at the forefront of developing cutting-edge Aerospace, Defense, Space, and Medical Device products. Your work will make a real impact, contributing to the core of engineering
General Information Job Title R&D Engineering, Sr Staff Engineer (RTL Design Engineer - FPGA) Job ID 15489 Country India City Bengaluru Date Posted 26-Feb-2026 Job Category Engineering Job Subcategory R&D Engineering Hire Type Employee Remote Eligible