Job Details: Job Description: Physical Design and Implementation Lead, Memory PHY IP (DDR/LPDDR)Intel is seeking an experienced Senior Director of Engineering to lead the Physical Design organization responsible for delivering best-in-class DDR and LPDDR Memory PHY IPs
Job Details: Job Description: About the Role As a Senior SoC Design Verification Engineer, you will lead verification efforts for complex system-on-chip (SoC) designs that enable Intels next generation of client computing and AI technologies. You
About the RoleThe Senior Director, Digital Workspace owns the global strategy, operations, and continuous evolution of technology experiences for all Gap Inc. employees, field teams, and business partners. This leader has enterprise-wide accountability across End User